Loren Data's SAM Daily™

fbodaily.com
Home Today's SAM Search Archives Numbered Notes CBD Archives Subscribe
FBO DAILY ISSUE OF MAY 25, 2003 FBO #0542
SOLICITATION NOTICE

A -- Intelligent Mixed Signal Microsystems Technology (IMMST)

Notice Date
5/23/2003
 
Notice Type
Solicitation Notice
 
Contracting Office
Other Defense Agencies, Defense Advanced Research Projects Agency, Contracts Management Office, 3701 North Fairfax Drive, Arlington, VA, 22203-1714
 
ZIP Code
22203-1714
 
Solicitation Number
BAA03-28
 
Response Due
7/8/2003
 
Archive Date
5/23/2004
 
Point of Contact
Edgar Martinez, DARPA Program Manager, Phone 000-000-0000, Fax 703-696-2206, - Edgar Martinez, DARPA Program Manager, Phone 000-000-0000, Fax 703-696-2206,
 
E-Mail Address
none, none
 
Description
The Defense Advanced Research Projects Agency (DARPA) is soliciting innovative research proposals to develop and demonstrate revolutionary concepts in broad-band, high dynamic range adaptable Analog-to-Digital (A/D) converters capable to adjust in real-time to rapidly changing signal characteristics. Of high interest are those approaches that could take advantage of recent breakthroughs in device technologies, integration techniques, and design tools and methodologies that enable innovative component architectures leading to the realization of highly adaptable, highly integrated A/D converters or Intelligent Mixed-signal Microsystems (IMMSTs). The proposed effort must include innovative approaches that enable revolutionary advances in mixed-signal A/D converters. This new class of architecture must be realized as low power, highly integrated circuits, components, and/or microsystems. Specifically excluded are those research activities that primarily result in evolutionary improvements to the existing state-of-practice of analog-to-digital conversion component technologies. The objective of this effort is to extend the effective dynamic range-bandwidth performance of multifunctional signal processing systems by exploring revolutionary concepts in analog-to-digital conversion techniques that will allow systems to optimize themselves in real-time to the particular properties of the signals of interest, thereby achieving orders of magnitude improvements and efficiency in the digitization process. An example of an intelligent digitization process is one that can take advantage of the particular analog frequency/time information-characteristics of the signals by self-adapting the hardware resulting in the conversion process being more effective in terms of bandwidth, dynamic range, and power consumption. Successful IMMSTs demonstrations will enable future systems to: (a) digitize analog signals in a more efficient way by adapting the conversion process to the particular characteristics of the signals of interest, (b) self-calibrate for detrimental non-linearities (c) self-compensate for design and/or fabrication process flaws, and (d) trade-off in real time dynamic range for bandwidth in situations when the trade-off is justifiable to improve overall performance or to minimize the system power consumption. For example, the ultimate goal is to demonstrate mixed-signal microsystems that will allow orders of magnitude improvements in the analog-to-digital conversion process by actively identifying the portion of the available bandwidth that contains the signal of interest, reduce the effective bandwidth, and digitize more efficiently the signal. In addition, highly integrated and low power approaches are desirable. This new class of Intelligent Microsystems (adaptable A/D converter) component must feature embedded design and test capabilities to allow adaptation (reconfigure on demand) of bandwidth and dynamic range performance to reflect the properties of the signal of interest, addressing the demanding needs of future multifunctional systems such as, autonomous sensors, and/or cognitive information systems. Of high interest are those approaches based on novel architectures capable of overcoming the limitations of current designs and fabrication technologies for high-performance A/D converters. Innovation in component architectures with embedded self-adapting capabilities will enable systems to modify their transfer functions on-demand, allowing them to self-tune or self-adapt their center frequency, bandwidth, and therefore, dynamic range. Potential bidders must select approaches that will lead to the realization of adaptable A/D converters capable of operating in dynamic (rapidly changing) environments. Examples of the performance potential of these intelligent mixed-signal systems include: (a) the digitization of a weak signal in the presence of strong interference (i.e. jamming signal, high clutter or noise levels, etc.), (b) detection, tracking, and digitization of pseudo random hopping signals that are dynamically changing on a broad-band spectral region, and (c) detection, tracking, and digitization of dynamically changing chirp signals. These scenarios are not inclusive. Other scenarios in which the signals of interest are rapidly changing and the digitization process with conventional A/D converters is not possible and only revolutionary concepts in A/D architectures will enable the digitization process are of high interest. Teaming is encouraged and the viability of teaming arrangements should be clearly explained in the full proposals. Emphasis will be placed on integrated approaches, i.e., integrated teams formed to better address the many different technological and scientific aspects of the Intelligent Mixed-signal Microsystems Technology program. Teaming between industries, universities, and/or federal and national laboratories with complementary areas of expertise is strongly encouraged. While innovative proposals from individuals or small groups will also be considered, a website http://www.davincinetbook.com/teams/login.asp will be established to facilitate teaming between interested parties. Specific information content, communications, networking, and team formation are the sole responsibilities of the participants. Neither DARPA nor the Department of Defense (DoD) endorses the destination website or the information and organizations contained therein, nor does DARPA or the DoD exercise any responsibility over the destination. This website is provided consistent with the stated purpose of this BAA. This effort has three phases. Phase I will be the architecture definition and critical building-block demonstration phase. This phase will have a maximum duration of eighteen months. Phase II will be the concept demonstration phase with a maximum duration of eighteen months. This phase of the effort will start immediately after the successful completion of the Phase I activities. Phase III will be the concept optimization phase. This phase of the program should last no more than 24 months. Only those concepts that promise to demonstrate significant improvements over the state-of-practice will be pursued during this phase of the program. The effort will culminate with the brass-board demonstrations of intelligent mixed-signal A/D converters with performance, and form factors suitable to address at least one military application. This announcement is soliciting proposals addressing the Phase I, II, and III activities. Phase II and III activities should be proposed as optional tasks starting nineteen months after the beginning of the effort. DARPA seeks innovative proposals in the following areas: (a) Innovative mixed-signal microsystem architectures concepts, (b) Adaptable mixed-signal building block strategies, (c) Active self-assessment and optimization strategies for mixed-signal components, and (d) Heterogeneous integration techniques and strategies for adaptable A/D converters. Additional information on these technology areas is provided in the Areas of Interest section of the BAA 03-28 Proposer Information Pamphlet referenced below. PROGRAM SCOPE Multiple awards are anticipated. Collaborative efforts/teaming are encouraged. A web site: http://www.davincinetbook.com/teams/login.asp has been established to facilitate formation of teaming arrangements between interested parties. Specific content, communications, networking, and team formation are the sole responsibility of the participants. Neither DARPA nor the Department of Defense (DoD) endorses the destination web site or the information and organizations contained therein, nor does DARPA or the DoD exercise any responsibility at the destination. This web site is provided consistent with the stated purpose of this BAA. Cost sharing is not required and is not an evaluation criterion but is encouraged where there is a reasonable probability of a potential commercial application related to the proposed research and development effort. The technical POC for this effort is Dr. Edgar J. Martinez fax: (703) 696-7436 electronic mail: BAA03-28@darpa.mil. GENERAL INFORMATION Proposers must obtain a pamphlet entitled ?BAA 03-28, Intelligent Mixed-Signal Microsystems Technology, Proposer Information Pamphlet? which provides further information on the technical scope of this program, the submission, evaluation, and funding processes, proposal formats, and other general information. This pamphlet may be obtained from the FedBizOpps website: http://www.fedbizopps.gov/, World Wide Web (WWW) at URL http://www.darpa.mil/ or by fax, electronic mail, or mail request to the administrative contact address given below. Proposals not meeting the format described in the pamphlet may not be evaluated. An original and nine (9) copies of the full proposal as specified in the Proposer Information Pamphlet, along with two (2) electronic copies (i.e., two separate disks) must be submitted to DARPA/MTO, 3701 North Fairfax Drive, Arlington, VA 22203-1714 (Attn.: BAA 03-28) on or before 4:00 p.m., local time, Tuesday, July 8, 2003, in order to be considered during the initial round of selections; however, proposals received after this deadline may be received and evaluated up to one year from date of posting on FedBizOpps. File formats for the electronic copies shall be PDF, and MS-Word-readable. Media for each copy may be a single CD-ROM, a single 100 Megabyte Iomega Zip (registered) disk, or a single 3.5-inch High Density MS-DOS formatted 1.44 Megabyte diskette. Each disk must be clearly labeled with BAA 03-28, proposer organization, proposal title (short title recommended), and Copy number __ of 2. Full proposals submitted after the due date specified in the BAA or due date otherwise specified by DARPA after review of proposals may be selected contingent upon the availability of funds. This notice, in conjunction with the BAA 03-28 Proposer Information Pamphlet, constitutes the total BAA. No additional information is available, nor will a formal RFP or other solicitation regarding this announcement be issued. Requests for the same will be disregarded. The Government reserves the right to select for award all, some, or none of the proposals received. All responsible sources capable of satisfying the Government's needs may submit a proposal; which shall be considered by DARPA. Input on technical aspects of the proposals may be solicited by DARPA from non-Government consultants /experts who are bound by appropriate non-disclosure requirements. Non-Government technical consultants/experts will not have access to proposals that are labeled by their offerors as ?Government Only?. Historically Black Colleges and Universities (HBCUs) and Minority Institutions (MIs) are encouraged to submit proposals and join others in submitting proposals; however, no portion of this BAA will be set aside for HBCU and MI participation due to the impracticality of reserving discrete or severable areas of research in device technologies, integration techniques, and design tools and methodologies that enable innovative component architectures. All administrative correspondence and questions on this solicitation, including requests for information on how to submit a full proposal to this BAA, should be directed to one of the administrative addresses below; e-mail or fax is preferred. DARPA intends to use electronic mail and fax for correspondence regarding BAA 03-28. Proposals may not be submitted by fax or e-mail; any so sent will be disregarded. DARPA encourages use of the WWW for retrieving the Proposer Information Pamphlet and any other related information that may subsequently be provided. EVALUATION CRITERIA Evaluation of full proposals will be accomplished through a technical review of each proposal using the following criteria, which are listed in descending order of relative importance: (l) overall scientific and technical merit, (2) potential contribution and relevance to DARPA mission, (3) plans and capability to accomplish technology transition, (4) offeror's capabilities and related experience, and (5) cost realism. Note: cost realism will only be significant in proposals; which have significantly under or over-estimated the cost to complete their effort. The administrative addresses for this BAA are: Fax: (703) 351-8616 (Addressed to: DARPA/MTO, BAA 03-28), Electronic Mail: BAA03-28@darpa.mil Mail: DARPA/MTO, ATTN: BAA 03-28 3701 North Fairfax Drive Arlington, VA 22203-1714 This announcement and the Proposer Information Pamphlet may be retrieved via the WWW at URL http://www.darpa.mil/ in the solicitations area.
 
Record
SN00331889-W 20030525/030523213710 (fbodaily.com)
 
Source
FedBizOpps.gov Link to This Notice
(may not be valid after Archive Date)

FSG Index  |  This Issue's Index  |  Today's FBO Daily Index Page |
ECGrid: EDI VAN Interconnect ECGridOS: EDI Web Services Interconnect API Government Data Publications CBDDisk Subscribers
 Privacy Policy  Jenny in Wanderland!  © 1994-2024, Loren Data Corp.