AWARD
A -- Intrachip/Interchip Enhanced Cooling Fundamentals (ICECool Fundamentals)
- Notice Date
- 4/4/2013
- Notice Type
- Award Notice
- NAICS
- 541712
— Research and Development in the Physical, Engineering, and Life Sciences (except Biotechnology)
- Contracting Office
- Other Defense Agencies, Defense Advanced Research Projects Agency, Contracts Management Office, 675 North Randolph Street, Arlington, Virginia, 22203-2114, United States
- ZIP Code
- 22203-2114
- Solicitation Number
- DARPA-BAA-12-50
- Archive Date
- 4/19/2013
- Point of Contact
- Jimmy K. Hupalar, Phone: 5712184810
- E-Mail Address
-
Jimmy.hupalar@darpa.mil
(Jimmy.hupalar@darpa.mil)
- Small Business Set-Aside
- N/A
- Award Number
- HR0011-13-C-0035
- Award Date
- 4/4/2013
- Awardee
- IBM, 1 North Castle Drive, Armonk, New York 10504-1785, United States
- Award Amount
- $4,974,500
- Description
- The ICECool Fundamentals thrust is the first step toward achieving the goals of the ICECool program and will develop the fundamental building blocks of intra- and interchip evaporative microfluidic cooling. ICECool Fundamentals will develop and demonstrate the microfabrication techniques needed to implement evaporative microfluidics in multiply-microchanneled semiconductor wafers and study, model, and correlate the thermofluidic characteristics of evaporative flows in such microchannel flow loops within individual chips and/or in the microgaps between chips in 3D stacks. ICECool will explore disruptive thermal technologies that will mitigate thermal limitations on the operation of military electronic systems, while significantly reducing size, weight, and power consumption (SWaP). These thermal limitations will be alleviated by integrating thermal management techniques into the chip layout, substrate structure, and/or package design, which will significantly shrink the dimensions of the cooling solution and provide superior cooling performance. Successful completion of this program will close the gap between chip-level heat generation density and system-level heat removal density in high-performance electronic systems, such as computers, RF electronics, and solid-state lasers. The overarching vision for ICECool is to place thermal management on an equal footing with functional design and power delivery and utilize embedded thermal management, including cooling and isothermalization, to enhance the performance of military electronic systems. Integration of the electrical and thermal designs is needed to overcome present thermal barriers that prevent full realization of the inherent capability of emerging solid state device technology. The integration of convective and/or evaporative microfluidic cooling into the commercial-off-the-shelf (COTS) supply chain is aimed at overcoming the excessive weight and volume, as well as thermally-limited performance, of traditionally-cooled COTS components. The specific goal of ICECool Fundamentals is to demonstrate chip-level heat removal in excess of 1 kW/cm 2 heat flux and 1 kW/cm 3 heat density with thermal control of local submillimeter hot spots with heat flux exceeding 5 kW/cm 2, while maintaining these components in their usually-accepted temperature range by judicious combination of intra- and/or interchip microfluidic cooling and on-chip thermal interconnects. ICECool Fundamentals is, thus, the first step toward achieving the system performance goals of the ICECool program and will develop the fundamental building blocks of intrachip and interchip evaporative microfluidic cooling. ICECool Fundamentals will, over an anticipated 24-36 months, develop and demonstrate the microfabrication techniques needed to implement thermal interconnects and evaporative microfluidics in multiply-microchanneled semiconductor chips and study, model, and correlate intrachip heat diffusion and the thermofluidic characteristics of evaporative flows in microchannel flow loops within individual chips and/or in the microgaps between chips in 3D stacks without compromising the combination of intra- and/or interchip microfluidic cooling and on-chip thermal interconnects in one of several possible semiconductor wafers.
- Web Link
-
FBO.gov Permalink
(https://www.fbo.gov/spg/ODA/DARPA/CMO/Awards/HR0011-13-C-0035.html)
- Record
- SN03029262-W 20130406/130404235223-a7548c8b179af46dd81f26daa6b6e304 (fbodaily.com)
- Source
-
FedBizOpps Link to This Notice
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