National Institute of Standards & Technology, Acquisition & Assistance Div., Bldg. 301, Rm B117, Gaithersburg, MD 20899

66 -- MOLECULAR MEASURING MACHINE CONTROLLER SOL 53SBNB760264 DUE 081297 POC Sandra Febach/301-975-6326; FAX 301-963-7732 WEB: NIST Contracts Homepage, http://www.nist.gov/admin/od/contract/contract.htm. E-MAIL: NIST Contracts Office, Contract@nist.gov. AMENDMENT 0002: The following questions and answers are provided as clarification of the referenced solicitation, and do not change requirements previously posted. As a result, the due date for submission of quotations is unchanged (08/12/97). QUESTION: Page 4 of the specification, Item 3 under Acceptance Tests states, "Inter-DSP communication via the DSP communication ports shall be demonstrated: An analog signal shall be digitized using an ADC on one VME card. The data stream shall be passed from that DSP to a DSP on another VME card through the DSP communication port. There the data shall be scaled by a factor of 0.5 and output through one of the DACs. The total phase delay between the input and the output shall be less than 50 usec plus one sample period." Does this mean any single sample must complete the circuit from input to ADC to output from DAC within 50 usec? ANSWER: Yes, a single sample must complete the circuit within allotted time. QUESTION: Would a Delta-Sigma architecture for the ADCs and DACs be acceptable in this case? ANSWER: No, Delta-Sigma converters are not acceptable. Note: Complete specifications will be provided upon request. (0219)

Loren Data Corp. http://www.ld.com (SYN# 0414 19970811\66-0013.SOL)